1. Field of the Invention
The present invention relates, in general, to the semiconductor device, in particular, to a semiconductor device that is improved so that the capacitance is increased while the area is reduced in size in a semiconductor device wherein a plurality of capacitors of which the sidewalls extend in the vertical direction to form storage nodes are aligned in the horizontal direction.
2. Description of the Background Art
It is necessary to fabricate a memory cell capacitor of which the capacitance is increased in as small an area as possible in order to increase the integration of a memory and mixed memory mounting device.
FIG. 17 is a plan view of a memory capacitor according to a prior art and FIG. 18 is a cross sectional view thereof.
Referring to these figures, an STI (shallow trench isolation) 7 is provided in the surface of a silicon substrate 8. Word lines 6 are provided on silicon substrate unit. Bit lines 4 are connected to the sources/drains of the transistors via polypads 5 and bit line contacts 4xe2x80x2. In addition, a capacitor 2 is connected to a transistor via a storage node contact 1 and a polypad 5. Capacitor 2 includes a storage node electrode 2a, a capacitor insulating film 2b and a cell plate electrode 2c. Aluminum wires 3 are provided above capacitor 2.
The plan view of the form of storage node 2a in a conventional capacitor is shown in FIG. 19. Storage node 2a is a rectangular in the plan view. The length of the longer sides of storage node 2a in the plan view is, for example, 0.42 xcexcm and the length of the shorter sides is 0.16 xcexcm.
Referring to FIG. 17, conventional storage nodes 2a are shown in the plan view, wherein the capacitors are arranged so as to extend in the direction in which a line extends connecting a storage node contact 1 with another storage node contact that is located adjacent to the storage node contact 1.
Referring to FIG. 17, the capacitors are arranged so that the longer sides of the storage nodes extend in the direction in which a line extends connecting a storage node contact (SC) with another storage node contact that is located adjacent to the storage node contact in the plan view in the conventional semiconductor memory device and, therefore, the size of rectangular type capacitor 2 can not be expanded any further while maintaining the capacitor structure, maintaining the arrangement of the capacitors and maintaining the arrangement of the storage node contacts according to the prior art as they are.
It is desirable, however, that the arrangement of storage node contacts 1 not be changed in order to optimize the arrangement of bit lines 4 and word lines 6 and, therefore, it is necessary to obtain the structure and the arrangement of new capacitors that allow the sizes of the longer sides and the shorter sides of the storage nodes to expand, that is to say, allow the capacitance of the capacitors to increase, without changing the arrangement of storage node contacts 1.
This invention is provided in order to solve the above described problem and an object thereof is to provide a semiconductor device that is improved so that a larger capacitance can be gained.
Another object of this invention is to provide a semiconductor device that is improved so that the total length of the longer side and the shorter side can be increased in the plan view of the storage node.
A semiconductor device according to the first aspect of this invention relates to a semiconductor device wherein a plurality of capacitors, of which the sidewalls of the storage nodes extend in the vertical direction, is aligned in the horizontal direction. The above described storage nodes are in a rectangular form consisting of longer sides and shorter sides in the plan view. The above described longer sides of the above storage nodes extend in the direction in which a line extends connecting the first storage node contact with the second storage node contact that is located diagonally adjacent to this first storage node contact in the plan view.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.